RAiO RA8875Character/Graphic TFT LCD Controller SpecificationDraft Version 0.1 January 26, 2011RAiO Technology Inc.?Copyright RAiO Technology Inc. 2011RAiO TECHNOLOGY INC.1/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD ControllerUpdate History Version 0.1 Date January 26, 2011 Draft Version DescriptionRAiO TECHNOLOGY INC.2/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD ControllerChapterContentsPage1. Description................................................................................................ 7 2. Features .................................................................................................... 7 3. Block Diagram .......................................................................................... 83-1 3-2 4-1 4-2 4-3 4-4 4-5 4-6 4-7 4-8 5-1 5-2 5-3 5-4 5-5 5-6 5-7 5-8 5-9 5-10 5-11 6-1 Block Diagram .................................................................................................... 8 System Block Diagram....................................................................................... 8 MCU Interface ..................................................................................................... 9 Serial MCU Interface......................................................................................... 10 LCD Panel Interface.......................................................................................... 10 Serial Flash/ROM Interface .............................................................................. 11 Touch Interface................................................................................................. 11 KEYSCAN Interface .......................................................................................... 11 PWM Interface................................................................................................... 12 Clock and Power Interface............................................................................... 12 Status Register ................................................................................................. 14 System & Configuration Registers ................................................................. 14 LCD Display Control Registers ....................................................................... 19 Active Window & Scroll Window Setting Registers ...................................... 24 Cursor Setting Registers ................................................................................. 27 Block Transfer Engine(BTE) Control Registers ............................................. 30 Touch Panel Control Registers ....................................................................... 36 Graphic Cursor Setting Registers................................................................... 38 PLL Setting Registers ...................................................................................... 39 PWM Control Registers.................................................................................... 40 Drawing Control Registers .............................................................................. 42 MCU Interface ................................................................................................... 566-1-1 Protocol ................................................................................................................................ 57 6-1-1-1 Parallel I/F Protocol ....................................................................................................57 6-1-2 Serial I/F Protocol ................................................................................................................ 60 6-1-2-1 3-Wire SPI Interface ...................................................................................................60 6-1-2-2 4-Wire SPI Interface ...................................................................................................63 6-1-2-3 IIC I/F .......................................................................................................................... 65 6-1-3 Read Status Register ..........................................................................................................68 6-1-4 Write Command to Register ...............................................................................................69 6-1-5 Memory Read / Write Operation .........................................................................................70 6-1-6 Interrupt and Wait................................................................................................................ 71 6-1-6-1 Interrupt ......................................................................................................................71 6-1-6-2 Wait............................................................................................................................. 724. Pin Description ......................................................................................... 95. Register ................................................................................................... 136. Hardware Interface ................................................................................. 56RAiO TECHNOLOGY INC.3/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller 6-1-7 Data Format.......................................................................................................................... 73 6-1-7-1 MCU Data Bus 16- Bit ................................................................................................ 73 6-1-7-2 MCU Data Bus 8-Bit ...................................................................................................746-2 6-3 6-4Driver I/F Color Setting Mode .......................................................................... 75 LCD Interface .................................................................................................... 766-3-1 Digital TFT Interface ............................................................................................................ 76External Serial Flash/ROM ............................................................................... 786-4-1 External Serial Font ROM ...................................................................................................81 6-4-2 External Serial Data ROM ...................................................................................................826-5 6-6 6-7 6-8 6-9 6-10Touch Panel I/F ................................................................................................. 83 KEYSCAN .......................................................................................................... 85 PWM................................................................................................................... 86 Clock and PLL................................................................................................... 87 Reset.................................................................................................................. 89 Power................................................................................................................. 916-10-1 Power Pin Description ........................................................................................................91 6-10-2 Power Architecture .............................................................................................................917. Function Description ............................................................................. 927-1 Scroll Function ................................................................................................. 927-1-1 Scroll Window & Scroll Offset............................................................................................92 7-1-2 Horizontal Scroll & Vertical Scroll ..................................................................................... 92 7-1-3 Layer Mixed Scroll ............................................................................................................... 93 7-1-3-1 Layer 1/2 Scroll Simultaneously .................................................................................94 7-1-3-2 Only Layer 1 Scroll .....................................................................................................94 7-1-3-3 Only Layer 2 Scroll .....................................................................................................95 7-1-3-4 Buffer Scroll (Layer 2 is used as Scroll Buffer)...........................................................967-2Active Window .................................................................................................. 977-2-1 7-2-2 7-2-3 7-2-4 Active Window Active Window Active Window Active Window for Font Write ............................................................................................ 97 for Geometric Input ..................................................................................98 for DMA......................................................................................................98 for Memory Write ...................................................................................... 987-3Cursor & Pattern............................................................................................... 997-3-1 Cursor Type.......................................................................................................................... 99 7-3-1-1 Graphic Cursor ...........................................................................................................99 7-3-1-2 Memory Read Cursor ...............................................................................................101 7-3-1-3 Memory Write Cursor ...............................................................................................101 7-3-1-4 Font Write Cursor .....................................................................................................102 7-3-2 Cursor Attribute................................................................................................................. 102 7-3-2-1 Cursor Blinking .........................................................................................................102 7-3-2-2 Cursor Height and Width ..........................................................................................103 7-3-3 Pattern ................................................................................................................................ 1057-4Font.................................................................................................................. 1067-4-1 7-4-2 7-4-3 7-4-4 7-4-5 7-4-6 7-4-7 Internal Font ROM .............................................................................................................106 External Font ROM ............................................................................................................111 CGRAM ............................................................................................................................... 112 90 Degree Font................................................................................................................... 114 Enlargement, Transparent Font .......................................................................................114 Font Change Line when Setting Write Auto Move .........................................................115 Font Full-Alignment...........................................................................................................115RAiO TECHNOLOGY INC.4/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller7-5Geometric Pattern Drawing Engine .............................................................. 1167-5-1 7-5-2 7-5-3 7-5-4 7-5-5 7-5-6 7-5-7 Circle Input ......................................................................................................................... 116 Ellipse Input ....................................................................................................................... 117 Curve Input......................................................................................................................... 118 Square Input....................................................................................................................... 119 Line Input............................................................................................................................ 120 Triangle Input ..................................................................................................................... 121 Square Of Circlar Corner Input ........................................................................................1227-6BTE (Block Transfer Engine) Function......................................................... 1237-6-1 Select BTE Start Point Address and Layer .....................................................................126 7-6-2 BTE Operations .................................................................................................................126 7-6-2-1 Write BTE .................................................................................................................126 7-6-2-2 Read BTE .................................................................................................................126 7-6-2-3 Move BTE .................................................................................................................126 7-6-2-4 Solid Fill ....................................................................................................................126 7-6-2-5 Pattern Fill.................................................................................................................126 7-6-2-6 Transparent Pattern Fill ............................................................................................126 7-6-2-7 Transparent Write BTE.............................................................................................126 7-6-2-8 Transparent Move BTE ............................................................................................126 7-6-2-9 Color Expansion .......................................................................................................127 7-6-2-10 Move BTE with Color Expansion ..............................................................................127 7-6-3 BTE Access Memory Method ...........................................................................................128 7-6-3-1 Block Memory Access ..............................................................................................128 7-6-3-2 Linear Memory Access .............................................................................................128 7-6-4 BTE Function Explaination...............................................................................................129 7-6-4-1 Write BTE with ROP .................................................................................................129 7-6-4-2 Read BTE (Burst Read Like Function) .....................................................................131 7-6-4-3 Move BTE in Positive Direction with ROP ................................................................132 7-6-4-4 Move BTE in Negative Direction with ROP ..............................................................134 7-6-4-5 Transparent Write BTE.............................................................................................136 7-6-4-6 Transparent Move BTE Positive Direction ............................................................... 138 7-6-4-7 Pattern Fill with ROP ................................................................................................139 7-6-4-8 Pattern Fill with Transparency ..................................................................................141 7-6-4-9 Color Expansion .......................................................................................................143 7-6-4-10 Color Expansion with Transparency.........................................................................146 7-6-4-11 Move BTE with Color Expansion ..............................................................................148 7-6-4-12 Move BTE with Color Expansion and Transparency................................................150 7-6-4-13 Solid Fill ....................................................................................................................1517-7Layer Mixed Function..................................................................................... 1527-7-1 7-7-2 7-7-3 7-7-4 7-7-5 7-7-6 7-7-7 Only Layer One is Visible .................................................................................................153 Only Layer Two is Visible .................................................................................................153 Lighten-Overlay Mode.......................................................................................................154 Transparent Mode .............................................................................................................155 Boolean OR ........................................................................................................................ 155 Boolean AND...................................................................................................................... 155 Floating Window................................................................................................................1567-8Touch Panel Function .................................................................................... 1577-8-1 Touch Panel Operation Mode...........................................................................................158 7-8-1-1 Auto Mode ................................................................................................................158 7-8-1-2 Manual Mode ............................................................................................................159 7-8-2 Touch Event Detection Modes .........................................................................................160 7-8-2-1 External Interrupt Mode ............................................................................................160 7-8-2-2 Software Polling Mode..............................................................................................160RAiO TECHNOLOGY INC.5/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller 7-8-3 Touch Panel Sampling Time Reference Table ...............................................................1617-9 KEYSCAN ........................................................................................................ 162 7-10 DMA(Direct Memory Access)......................................................................... 1657-10-1 DMA In Contineous Mode .................................................................................................165 7-10-2 DMA In Block Mode ...........................................................................................................1667-11 PWM................................................................................................................. 167 7-12 Sleep Mode...................................................................................................... 1698. AC/DC Characteristic ........................................................................... 1718-1 8-2 Maximum Absolute Limit ............................................................................... 171 DC Characteristic ........................................................................................... 1729. Package................................................................................................. 173RAiO TECHNOLOGY INC.6/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller1. DescriptionRA8875 is a text/graphic mixed display with 2 layers TFT LCD controller. It is designed to meet the requirement of middle size TFT module up to 800x480 pixels with characters or 2D graphic application. Embedded 768KB display RAM provides user a flexible solution for display buffer of almost application. Besides, the interface of external serial flash is optional to provide the up to 32x32pixels font bitmap for BIG5/GB coding. For graphic usage, RA8875 supports a 2D Block Transfer Engine(BTE) that is compatible with 2D BitBLT function for processing the mass data transfer. The advanced geometric speed-up engine provides user an easy way to draw the programmable geometric shapes by hardware, like line, square, circle and ellipse. Besides, for different end-user applications, many powerful functions are integrated with RA8875, such as scroll function, floating window display, graphic pattern and font enlargement function. These functions will save user a large of software effort during development period. RA8875 is a powerful and cheap choice for color display application. To reduce the system cost, RA8875 provides low cost and easy-to-use
parallel MCU interface. Because of the powerful hardware speed-up function embedded in it, less data transfer is needed so more efficiency is improved, RA8875 also provides serial SPI/I2C I/F with ultra-low pin-count. Useful device controller, such as flexible 4-wire touch panel controller, PWM for adjusting panel back-light are also included to reduce the system cost for customer. With the RA8875 design-in, user can achieve an easy-to-use, low-cost and high performance system comparing with the other solution.2. FeaturesSupport Text/Graphic Mixed Display Mode. Embedded 768KB DDRAM. Color Depth TFT: 256/65K Colors. Supporting TFT 8/16 bpp Generic RGB Interface. Supporting TFT Panel Size: 800x480 Pixels 2 Layers @ 256 Colors. 800x480 Pixels 1 Layer @ 64K Colors. 480x272 Pixels 2 Layers @ 64K Colors. Supporting MCU Interface :
with 8/16 Data Bus Width I2C or 3/4-wire SPI I/F. Powerful Block Scrolling Function for Vertical or Horizontal Direction. Embedded 10KB Character ROM with Font Size 8x16 Dots and Supporting Character Sets of ISO/IEC /3/4. External Serial Flash/ROM SPI I/F Supporting. Supporting Genitop Inc. UNICODE/BIG5/GB Serial font ROM with 16x16/24x24/32X32 dots Font Size. Font Enlargement Function X1, X2, X3, X4 for Horizontal/Vertical Direction. Font Vertical Rotation Mode Function. Block Transfer Engine (BTE) Supports with 2D Function, Compatible with 2D BitBLT Function. Embedded Geometric Speed-up Engine. Programmable Font Write Cursor for Writing with Character. 32x32 pixels Graphic Cursor Function. User-defined Characters. 256 Characters with 8x16 dots. Supporting 32 User-defined Patterns of 8x8 pixels, or 16 User-defined Pattern for 16x16 pixels. Two Programmable PWM for Back-Light Adjusting or other's Application. Embedded 4-wire Touch Panel Controller. Sleep Mode with Low Power Consumption. Embedded Smart 4x5 Key-Scan Controller. 4 Sets of Programmable GPO and a fixed GPOX. 5 Sets of Programmable GPI and a fixed GPIX Clock Source : Embedded Crystal Oscillator Circuit with Programmable PLL. Operation Voltage: 3.0V~3.6V. Package: TQFP-100pin.RAiO TECHNOLOGY INC.7/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller3. Block Diagram3-1 Block DiagramDB[15:0] RD#/EN# WR#/RW# CS# RS C86 WAIT# INT# SCL SDI SDO SCS# SIFS0 SIFS1 IICA[1:0] KOUT [3:0]/ GPO [3:0] KIN [4:0]/ GPI [4:0] GPOX GPIXMPU I/F BlockRegister BlockGeometric Speed-up EngineGeneric TFT driver I/FPDAT[15:0] HSYNC VSYNC PCLK DEI2C/SPIDDRAMFONT EngineSerial Flash/ROM IFSFCL SFDI SFDO SFCS0# SFCS1#KEYSCAN ControllerADC2D-BTE Engine CGROM 4 wires Touch Panel Controller PWM Scroll Engine Pattern/ Cursor RESET ControlPLLXP XN YP YN ADC_VREFXI XO TEST[2:0]OSC TEST CircuitPWM1 PWM2 RST#Figure 3-1 : RA8875 Block Diagram3-2System Block DiagramSPI /I2C Serial Flash8/16 bits MPUTFT LCD ModuleRA8875KEYPAD /GPIO 4 wires Touch PanelPWMFigure 3-2 : RA8875 System Block DiagramRAiO TECHNOLOGY INC.8/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller4. Pin Description4-1 MCU InterfaceI/O Pin Description Data Bus These are data bus for data transfer between MCU and RA8875. When setting register number and register data, DB[7:0] is used. When writing data to display RAM, DB[15:0] is used according to data bus mode setting. DB[15:8] will be input and should be pull-low or pullhigh when 8-bit data bus mode is used. Enable/Read Enable When MCU interface (I/F) is 8080 series, this pin is used as RD# signal (Data Read) , active low. When MCU I/F is 6800 series, this pin is used as EN signal (Enable), active high. Write/Read-Write When MCU I/F is 8080 series, this pin is used as WR# signal (data write) , active low. When MCU I/F is 6800 series, this pin is used as RW# signal (data read/write control) . Active high for read and active low for write. Chip Select Input Low active chip select pin. Command / Data Select Input The pin is used to select command/data cycle. RS = 0, data Read/Write cycle is selected. RS = 1, status read/command write cycle is selected. In 8080 interface, usually it connects to “A0” address pin. RS 0 0 1 1 WR# 0 1 0 1 Access Cycle Data Write Data Read CMD Write Status ReadPin NameDB[15:0]IORD# (EN)IWR# (RW#) CS#IIRSIC86IPSIINT#OWAIT#OMCU Interface Select 0: 8080 interface is selected 1: 6800 interface is selected Parallel /Serial I/F Select Input 0: Parallel
I/F select 1: Serial 3/4-wire SPI or IIC I/F select. PS input is used to select the active MCU interface, it must be set correctly before the command /data cycle asserting. Interrupt Signal Output The interrupt output for MCU to indicate the status of RA8875. Wait Signal Output This is a WAIT# output to indicate the RA8875 is in busy state. The RA8875 can’t access MCU cycle when WAIT# pin is active. It is active low and could be used for MCU to poll busy status by connecting it to I/O port.RAiO TECHNOLOGY INC.9/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller4-2Serial MCU InterfaceI/O I Pin Description SPI Clock 3-wire, 4-wire Serial or IIC I/F clock. If no use, please connect it to GND. IIC data /4-wire SPI Data Input 4-wire SPI I/F: Data input for serial I/F. 3-wire SPI I/F: NC, please connect it to GND. IIC I/F: Bi-direction data for serial I/F If no use, please connect it to GND. 3-wire SPI Data /4-wire SPI Data Output 4-wire SPI I/F: Data output for serial I/F. 3-wire SPI I/F: Bi-direction data for serial I/F IIC I/F: NC, if no use, please keep floating. If no use, please keep floating. SPI Chip Select Chip select pin for 3-wire or 4-wire serial I/F. IIC I/F : NC, please connect it to GND. If no use, please connect it to GND. IIC I/F: IIC Address Select. Other I/F: NC, please connect it to GND. Serial Interface Selection 00 : NC. 01 : 3-Wire SPI 10 : 4-Wire SPI 11 : IIC If serial I/F is no use, please connect them to 00.Pin Name SCLSDII/OSDOI/OSCS#IIICA[1:0]ISIFS[1:0]I4-3LCD Panel InterfaceI/O Pin Description LCD Panel Data Bus TFT LCD data bus output for source driver. RA8875 supports 256/64K color depth by register (REG[10h]), user can connect corresponding RGB bus for different setting. For unused pin please keeps it floating.Pin NamePDAT[15:0]OColor Depth 256 64KRed PDAT[15:14] PDAT[15:11]Green PDAT[10:8] PDAT[10:5]Blue PDAT[4:3] PDAT[4:0]HSYNC VSYNC PCLK DEO O O OHSYNC Pulse Generic TFT interface signal. VSYNC Pulse Generic TFT interface signal. Pixel Clock Generic TFT interface signal. Data Enable Generic TFT interface signal.RAiO TECHNOLOGY INC.10/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller4-4Serial Flash/ROM InterfaceI/O O I/O Pin Description External Serial Flash/ROM Clock Serial Flash/ROM SPI I/F clock. External Flash/ROM SPI Data Input Single mode: Data input of serial Flash/ROM SPI I/F. For RA8875, it is output (Default). Dual mode: The signal is used as bi-direction data #0(SIO0). External Flash/ROM SPI Data Output Single mode: Data output of serial Flash/ROM SPI I/F. For RA8875, it is input(Default). Dual mode: The signal is used as bi-direction data #1(SIO1). External Flash/ROM SPI Chip Select 0 Chip select pin for serial Flash/ROM SPI I/F #0. External Flash/ROM SPI Chip Select 1 Chip select pin for serial Flash/ROM SPI I/F #1.Pin Name SFCLSFDI/SIO0SFDO/SIO1I/OSFCS0# SFCS1#O O4-5Touch InterfaceI/O A A A A A Pin Description YN Signal for Touch Panel 4-wire TP YN Control Signal. YP Signal for Touch Panel 4-wire TP YP Control Signal. XN Signal for Touch Panel 4-wire TP XN Control Signal. XP Signal for Touch Panel 4-wire TP XP Control Signal. TP ADC Reference Voltage This pin is the reference voltage for ADC as 0.5*VDD. The reference voltage could be generated by RA8875 (default) or from external circuit.Pin Name YN YP XN XP ADC_VREF4-6KEYSCAN InterfaceI/O O Pin Description Keypad Strobe Line or GPOs(General Purpose Output) Keypad matrix strobe lines outputs with open-drain. (Default). They could be programmed as GPOs by register setting, if don’t use, please keep floating. Keypad Data Line or GPIs (General Purpose Input) Keypad data inputs (Default), please add pull-up resister. They could be programmed as GPIs by register setting, if don’t use, please connect it to GND. Extra GPO(General Purpose Output) Additional GPO signal, if don’t use, please keep floating. Extra GPI(General Purpose Input) Additional GPI signal, if don’t use, please connect it to GND.Pin Name KOUT[3:0]/ (GPO[3:0]) KIN[4:0]/ (GPI[4:0]) GPOX GPIXIO IRAiO TECHNOLOGY INC.11/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller4-7PWM InterfaceI/O O O Pin Description PWM signal output 1 PWM signal output 2Pin Name PWM1 PWM24-8Clock and Power InterfaceI/O I O Pin Description Crystal Input Pin Input pin for internal crystal circuit. It should be connected to external crystal circuit. That will generate the system clock for RA8875. Crystal Output Pin Output pin for internal crystal circuit. It should be connected to external crystal circuit. That will generate the system clock for RA8875. Reset Signal Input This active-low input performs a hardware reset on the RA8875. It is a Schmitt-trigger input with pull-up resistor for enh however, it must ensure that it is not triggered if the supply voltage is too low. Test Mode Input For chip test function, should be connected to GND for normal operation. IO VDD 3.3V IO power input. CORE VDD 1.8 V Core power input. LDO VDD Output 1.8V power generated by internal LDO. It must connect bypass capacities to prevent power noise. LDO GND Ground signal for internal LDO. OSC IO VDD The separated OSC 3.3V IO power. OSC VDD OSC 1.8 V power input. It is used by OSC core. It is suggested to connect the bypass capacitor nearby the pad. OSC IO GND The separated OSC IO ground signal. OSC GND OSC ground signal and are internally connected to OSC_GNDP. ADC VDD ADC 3.3V power signal. ADC GND ADC ground signal GND IO Cell/Core ground signalPin Name XIXORST#ITEST[2:0] VDDP CORE_VDD LDO_OUT LDO_GND OSC_VDDP OSC_VDD OSC_GNDP OSC_GND ADC_VDD ADC_GND GNDI P P P P P P P P P P PRAiO TECHNOLOGY INC.12/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller5. RegisterThere are 4 types of cycles used in MCU interface of RA8875, please refer to Table 5-1 for detail. The programming or reading of the registers in RA8875 is composed by the cycles. RA8875 includes a status register and tens of instruction registers. The status register is read only and can be read by “Status Read” cycle. The instruction registers, that is used to program almost functions, can be programmed by “Command Write” cycle and “Data Write” cycle. The “Command Write” cycle sets the register number to program, and the “Data Write” cycle set the data of the register. When reading the specific instruction registers, MCU asserts a “Data read” cycle following the “Command Write cycle”. The “Command Write” cycle sets the register number to program, and the “Data Read” cycle read the data of the register. The instruction registers are classified to 15 categories as Table 5-2, most of which are readable/writable. All of the registers will be illustrated in the following sections. And Chapter 12 is the summary of these registers. Table 5-1 : MCU Cycle Type Cycle Type Command Write Status Read Data Write Data Read RW# 0 1 0 1 RS 1 1 0 0 Status read cycle Corresponding Register data/Memory data write cycle following the Command Write cycle. Corresponding Register data/Memory data read cycle following the Command Write cycle. Description Register number write cycleTable 5-2 : The Categories of the Instruction Registers No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Command Registers System and Configuration Registers LCD Display Control Registers Active Window Setting Registers Cursor Setting Registers BTE Control Registers Touch Panel Control Registers Graphic Cursor Setting Registers PLL Setting Registers PWM Control Registers Drawing Control Registers DMA Control Registers KEY & IO Control Registers Floating Window Control Registers Serial Flash Control Registers Interrupt Control Registers Address [00h], [01h], [02h], [04h], [10h] ~ [1Fh] [20h] ~ [29h] [30h] ~ [3Fh] [40h] ~ [4Eh] [50h] ~ [67h] [70h] ~ [74h] [80h] ~ [85h] [88h], [89h] [8Ah] ~ [8Eh] [90h] ~ [ACh] [B0h] ~ [BFh] [C0h] ~ [C7h] [D0h] ~ [DBh] [E0h] ~ [E2h] [F0h] ~ [F1h]RAiO TECHNOLOGY INC.13/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller The registers function description is listed below, for each register, a register name and register number is described upper each register function table. Each register contains up-to 8 bits data. In the register function table, detail description, default value and access attribute (RO: Read only, WO: Write only, RW: Read-able and Write-able) are described.5-1Status RegisterStatus Register (STSR) Bit 7 Description Memory Read/Write Busy (Include Font Write Busy) 0 : No Memory Read/Write event. 1 : Memory Read/Write busy. BTE Busy 0 : BTE is done or idle. 1 : BTE is busy. Touch Panel Event Detected 0 : Touch Panel is not touched. 1 : Touch Panel is touched. This bit comes from the TP controller ADET signal directly and not de-bounced. It’s suggested to check the validation for multiple polling. Sleep Mode Status 0: RA8875 in Normal mode. 1: RA8875 in Sleep mode. N/A Serial Flash/ROM Busy Serial Flash/ROM busy status at Direct Access Mode Default 0 Access RO60RO50RO4 3-1 00 0 0RO RO RONote : “RO” means read only.5-2System & Configuration RegistersREG[01h] Power and Display Control Register (PWRR) Bit 7 6-2 Description LCD Display Off 0 : Display off. 1 : Display on. NA Sleep Mode 0 : Normal mode. 1 : Sleep mode. Note: 1. There are 3 ways to wake up from sleep mode: Touch Panel wake up, Key Scan wake up ,Software wake up. 2. When using IIC interface, this function is not supported. Software Reset 0 : No action. 1 : Software Reset. Note: The bit must be set to 1 and then set to 0 to complete a software reset. Default 0 0 Access RW RO10RW00WORAiO TECHNOLOGY INC.14/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD ControllerREG[02h] Memory Read/Write Command (MRWC) Bit Description Write Function : Memory Write Data Data to write in memory corresponding to the setting MWCR1[3:2]. Continuous data write cycle can be accepted bulk data write case. Read Function : Memory Read Data Data to read from memory corresponding to the setting MWCR1[3:2]. Continuous data read cycle can be accepted bulk data read case. Note that the first data read cycle dummy read and need to be ignored. of in -of in is RW Default Access7-0REG[04h] Pixel Clock Setting Register (PCSR) Bit 7 6-2 Description PCLK Inversion 0 : PDAT is fetched at PCLK rising edge. 1 : PDAT is fetched at PCLK falling edge. NA PCLK Period Setting Pixel clock (PCLK) period setting. 00b: PCLK period = System Clock period. 01b: PCLK period = 2 times of System Clock period. 10b: PCLK period = 4 times of System Clock period. 11b: PCLK period = 8 times of System Clock period. Default 0 0 Access RW RO1-00RWREG[05h] Serial Flash/ROM Configuration Register (SROC) Bit 7 6 5 Description Serial Flash/ROM I/F # Select 0: Serial Flash/ROM 0 I/F is selected. 1: Serial Flash/ROM 1 I/F is selected. Serial Flash/ROM Address Mode 0: 24 bits address mode 1: 32 bits address mode Serial Flash/ROM Waveform Mode Mode 0. Mode 3. Serial Flash /ROM Read Cycle 00b: 4 bus no dummy cycle 01b: 5 bus 1 byte dummy cycle 1Xb: 6 bus 2 byte dummy cycle Serial Flash /ROM Access Mode 0: Font mode 1: DMA mode Serial Flash /ROM I/F Data Latch Mode Select 0Xb: Single Mode 10b: Dual Mode 0. 11b: Dual Mode 1. Default 0 0 0 Access RW RW RW4-30RW20RW1-00RWRAiO TECHNOLOGY INC.15/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[06h] Serial Flash/ROM CLK Setting Register(SFCLR) Bit 7-2 Description NA Serial Flash/ROM Clock Frequency Setting 0xb: SFCL frequency = System clock frequency (When DMA enable and Color depth = 256 color SFCL frequency = System clock frequency /2) 10b: SFCL frequency = System clock frequency / 2 11b: SFCL frequency = System clock frequency / 4 Default 0 Access RO1-00RWREG[10h] System Configuration Register (SYSR) Bit 7-4 3-2 N/A Color Depth Setting 00b : 8-bpp generic TFT, i.e. 256 colors. 1xb : 16-bpp generic TFT, i.e. 65K colors. MCUIF Selection 00b : 8-bit MCU Interface. 1xb : 16-bit MCU Interface. Description Default 0 0 Access RO RW1-00RWREG[12h] GPI Bit 7-5 4-0 NA GPI[4:0] : General Purpose Input. KEY_EN = 0: General Purpose Input from pin KIN[4:0] KEY_EN = 1: NC Description Default 0 0 Access RO RONote : KEY_EN : REG[C0h] bit 7REG[13h] GPO Bit 7-4 3-0 NA GPO[3:0] : General Purpose Output KEY_EN = 0: General Purpose Output to KOUT[3:0] KEY_EN = 1: NC Description Default 0 0 Access RO RWNote : KEY_EN : REG[C0h] bit 7REG[14h] LCD Horizontal Display Width Register (HDWR) Bit 7 Description Default AccessNA 0 RO Horizontal Display Width Setting Bit[6:0] The register specifies the LCD panel horizontal display width in 6-0 0 RW the unit of 8 pixels resolution. Horizontal display width(pixels) = (HDWR + 1)x8 Note : HDWR must be set less than 64h because that the maximum horizontal display width is 800 pixels.RAiO TECHNOLOGY INC.16/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[15h] Horizontal Non-Display Period Fine Tuning Option Register (HNDFTR) Bit 7 6-4 3-0 Description DE Polarity 0 : high active. 1 : low active. NA Horizontal Non-Display Period Fine Tuning(HNDFT) [3:0] This register specifies the fine tuning for horizontal non- it is used to support the SYNC mode panel. Each level of this modulation is 1-pixel. Default 0 0 0 Access RW RO RWREG[16h] LCD Horizontal Non-Display Period Register (HNDR) Bit 7-5 4-0 Description NA Horizontal Non-Display Period(HNDP) Bit[4:0] This register specifies the horizontal non-display period. Horizontal Non-Display Period (pixels)= [(HNDR + 1)x8. Default 0 0 Access RO RWREG[17h] HSYNC Start Position Register (HSTR) Bit 7-5 4-0 Description NA HSYNC Start Position[4:0] The starting position from the end of display area to the beginning of HSYNC. Each level of this modulation is 8-pixel. HSYNC Start Position(pixels) = (HSTR + 1)x8 Default 0 0 Access RO RWREG[18h] HSYNC Pulse Width Register (HPWR) Bit 7 6-5 4-0 Description HSYNC Polarity 0 : Low active. 1 : High active. NA HSYNC Pulse Width(HPW) [4:0] The period width of HSYNC. HSYNC Pulse Width(pixels) = (HPW + 1)x8 Default 0 0 0 Access RW RO RWREG[19h] LCD Vertical Display Height Register (VDHR0) Bit 7-0 Description Vertical Display Height Bit[7:0] Vertical Display Height(Line) = VDHR + 1 Default 0 Access RWRAiO TECHNOLOGY INC.17/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[1Ah] LCD Vertical Display Height Register0 (VDHR1) Bit 7-1 Description Default Access NA 0 RO Vertical Display Height Bit[8] 0 0 RW Vertical Display Height(Line) = VDHR + 1 Note : The VDHR must be set less than 1E0h, because the maximum vertical display height is 480.REG[1Bh] LCD Vertical Non-Display Period Register (VNDR0) Bit 7-0 Description Vertical Non-Display Period Bit[7:0] Vertical Non-Display Period(Line) = (VNDR + 1) Default 0 Access RWREG[1Ch] LCD Vertical Non-Display Period Register (VNDR1) Bit 7-1 0 Description NA Vertical Non-Display Period Bit[8] Vertical Non-Display Period(Line) = (VNDR + 1) Default 0 0 Access RO RWREG[1Dh] VSYNC Start Position Register (VSTR0) Bit 7-0 Description VSYNC Start Position[7:0] The starting position from the end of display area to the beginning of VSYNC. VSYNC Start Position(Line) = (VSTR + 1) Default 0 Access RWREG[1Eh] VSYNC Start Position Register (VSTR1) Bit 7-1 0 Description NA VSYNC Start Position[8] The starting from the end of display area to the beginning of VSYNC. VSYNC Start Position(Line) = (VSTR + 1) Default 0 0 Access RO RWREG[1Fh] VSYNC Pulse Width Register (VPWR) Bit 7 Description VSYNC Polarity 0 : Low active. 1 : High active. VSYNC Pulse Width[6:0] The pulse width of VSYNC in lines. VSYNC Pulse Width(Line) = (VPWR + 1) Default 0 Access RW6-00RWRAiO TECHNOLOGY INC.18/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller5-3LCD Display Control RegistersREG[20h] Display Configuration Register (DPCR) Bit 7 6-4 3 Description Layer Setting Control 0 : One layer configuration is selected. 1 : Two layers configuration is selected.. NA HDIR Horizontal Scan Direction, for n = SEG number. 0 : SEG0 to SEG(n-1). 1 : SEG(n-1) to SEG0. VDIR Vertical Scan direction, for n = COM number 0 : COM0 to COM(n-1) 1 : COM(n-1) to COM0 NA Default 0 0 0 Access RW RO RW2 1-00 0RW ROREG[21h] Font Control Register 0 (FNCR0) Bit Description CGRAM/CGROM Font Selection Bit in Text Mode 0 : CGROM font is selected. 1 : CGRAM font is selected. Note: The bit is used to select the bit-map source when textmode is active(REG[40h] bit 7 is 1), when CGRAM is writing(REG[41h] bit 3-2 =01b), the bit must be set as “0”. NA External/Internal CGROM Selection Bit 0 : Internal CGROM is selected.(REG[2Fh] must be set 00h ) 1 : External CGROM is selected. NA Font Selection for internal CGROM When FNCR0 B7 = 0 and B5 = 0, Internal CGROM supports the 8x16 character sets with the standard coding of ISO/IEC 88591~4, which supports English and most of European country languages. 00b : ISO/IEC b : ISO/IEC b : ISO/IEC b : ISO/IEC 8859-4. Default Access70RW6 5 4-20 0 0RO RW RO1-00RWRAiO TECHNOLOGY INC.19/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[22h] Font Control Register1 (FNCR1) Bit 7 6 5 4 Description Full Alignment Selection Bit 0 : Full alignment is disable. 1 : Full alignment is enable. Font Transparency 0 : Font with background color. 1 : Font with background transparency. NA Font Rotation 0 : Normal. 1 : 90 degree display. Horizontal Font Enlargement 00b : X1. 01b : X2. 10b : X3. 11b : X4. Vertical Font Enlargement 00b : X1. 01b : X2. 10b : X3. 11b : X4. Default 0 0 0 0 Access RW RW RO RW3-20RW1-00RWREG[23h] CGRAM Select Register (CGSR) Bit Description CGRAM No. The setting of the number of the character in CGRAM. It’s used to write the user-defined character bitmap data into CGRAM. 16 continuous data write cycles compete the bitmap writing of a 8x16 character. Note that the MWCR1 bit 3-2 must be set as 01b(CGRAM) first. And more than 16 data write cycles will loop back to the 1st data and cover the bitmap. Default Access7-00RWREG[24h] Horizontal Scroll Offset Register 0 (HOFS0) Bit 7-0 Description Horizontal Display Scroll Offset [7:0] The display offset of the horizontal direction, changing the value will cause the effect of scrolling at horizontal direction. Default 0 Access RWREG[25h] Horizontal Scroll Offset Register 1 (HOFS1) Bit 7-3 2-0 Description NA Horizontal Display Scroll Offset [10:8] The display offset of the horizontal direction, changing the value will cause the effect of scrolling at horizontal direction. Default 0 0 Access RO RWRAiO TECHNOLOGY INC.20/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[26h] Vertical Scroll Offset Register 0 (VOFS0) Bit 7-0 Description Vertical Display Scroll Offset [7:0] The display offset of the vertical direction, changing the value will cause the effect of scrolling at vertical direction. Default 0 Access RWREG[27h] Vertical Scroll Offset Register 1 (VOFS1) Bit 7-2 1-0 Description NA Vertical Display Scroll Offset [9:8] The display offset of the vertical direction, changing the value will cause the effect of scrolling at vertical direction. Default 0 0 Access RO RWREG[29h] Font Line Distance Setting Register (FLDR) Bit 7-5 4-0 Description NA Font Line Distance Setting Setting the font character line distance when setting memory font write cursor auto move. (Unit: pixel) Default 0 0 Access RO RWActive window瑞佑科技Font line distanceRA i OFigure 5-1 : Character Line DistanceREG[2Ah] Font Write Cursor Horizontal Position Register 0 (F_CURXL) Bit 7-0 Description Font Write Cursor Horizontal Position[7:0] The setting of the horizontal cursor position for font writing. Default 0 Access RWREG[2Bh] Font Write Cursor Horizontal Position Register 1 (F_CURXH) Bit 7-2 1-0 Description NA Font Write Cursor Horizontal Position[9:8] The setting of the horizontal cursor position for font writing. Default 0 0 Access RO RWRAiO TECHNOLOGY INC.21/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[2Ch] Font Write Cursor Vertical Position Register 0 (F_CURYL) Bit 7-0 Description Font Write Cursor Vertical Position[7:0] The setting of the vertical cursor position for font writing. Default 0 Access RWREG[2Dh] Font Write Cursor Vertical Position Register 1 (F_CURYH) Bit 7-1 0 Description NA Font Write Cursor Vertical Position[8] The setting of the vertical cursor position for font writing. Default 0 0 Access RO RWREG[2Eh] Font Write Type Setting Register Bit Font Size Setting Full Size 00b 7-6 01b 1Xb 16x16 24x24 32x32 Half-Size 8x16 12x24 16x32 Variable Width NX16 NX24 NX32 0 RW Description Default Access5-0Note: The font width indicated by “N” depends on the character code of the FONT. Font to Font Width Setting 00h : Font width off 01h : Font to Font width = 1 pixel 02h : Font to Font width = 2 pixels . . 3Fh : Font to Font width = 63 pixels0RWFont to Font widthR AiOFigure 5-2 : Font to Font WidthRAiO TECHNOLOGY INC.22/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[2Fh] Serial Font ROM Setting Bit Description GT Serial Font ROM Select 000b: GT21L16TW / GT21H16T1W 001b: GT23L16U2W 010b: GT23L24T3Y / GT23H24T3Y 011b: GT23L24M1Z 100b: GT23L32S4W / GT23H32S4W FONT ROM Coding Setting For specific GT serial Font ROM, the coding method must be set for decoding. 000b: GBb: GB12345/GBb: BIG5 011b: UNICODE 100b: ASCII 101b: UNI-Japanese 110b: JISb: Latin/Greek/ Cyrillic / Arabic ASCII / Latin/Greek/ Cyrillic / Arabic Latin / Greek ASCII /Cyrillic 00b Normal Normal 1-0 01b 10b 11b Arial Roman Bold Variable Width NA NA Default Access7-50RW4-20RWArabic NA Presentation Forms-A Presentation Forms-B NA 0 RWRAiO TECHNOLOGY INC.23/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller5-4Active Window & Scroll Window Setting RegistersREG[30h] Horizontal Start Point 0 of Active Window (HSAW0) Bit 7-0 Description Horizontal Start Point of Active Window [7:0] Default 0 Access RWREG[31h] Horizontal Start Point 1 of Active Window (HSAW1) Bit 7-2 1-0 Description NA Horizontal Start Point of Active Window [9:8] Default 0 0 Access RO RWREG[32h] Vertical Start Point 0 of Active Window (VSAW0) Bit 7-0 Description Vertical Start Point of Active Window [7:0] Default 0 Access RWREG[33h] Vertical Start Point 1 of Active Window (VSAW1) Bit 7-1 0 Description NA Vertical Start Point of Active Window [8] Default 0 0 Access RO RWREG[34h] Horizontal End Point 0 of Active Window (HEAW0) Bit 7-0 Description Horizontal End Point of Active Window [7:0] Default 0 Access RWREG[35h] Horizontal End Point 1 of Active Window (HEAW1) Bit 7-2 1-0 NA Horizontal End Point of Active Window [9:8] Description Default 0 0 Access RO RWREG[36h] Vertical End Point of Active Window 0 (VEAW0) Bit 7-0 Description Vertical End Point of Active Window [7:0] Default 0 Access RWREG[37h] Vertical End Point of Active Window 1 (VEAW1) Bit 7-1 0 NA Vertical End Point of Active Window [8] Description Default 0 0 Access RO RWRAiO TECHNOLOGY INC.24/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller(HSAW,VSAW)Active Window(HEAW,VEAW)Figure 5-3 : Active WindowREG[38h] Horizontal Start Point 0 of Scroll Window (HSSW0) Bit 7-0 Description Horizontal Start Point of Scroll Window [7:0] Default 0 Access RWREG[39h] Horizontal Start Point 1 of Scroll Window (HSSW1) Bit 7-2 1-0 NA Horizontal Start Point of Scroll Window [9:8] Description Default 0 0 Access RO RWREG[3Ah] Vertical Start Point 0 of Scroll Window (VSSW0) Bit 7-0 Description Vertical Start Point of Scroll Window [7:0] Default 0 Access RWREG[3Bh] Vertical Start Point 1 of Scroll Window (VSSW1) Bit 7-1 0 NA Vertical Start Point of Scroll Window [8] Description Default 0 0 Access RO RWREG[3Ch] Horizontal End Point 0 of Scroll Window (HESW0) Bit 7-0 Description Horizontal End Point of Scroll Window [7:0] Default 0 Access RWREG[3Dh] Horizontal End Point 1 of Scroll Window (HESW1) Bit 7-2 1-0 NA Horizontal End Point of Scroll Window [9:8] Description Default 0 0 Access RO RWRAiO TECHNOLOGY INC.25/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[3Eh] Vertical End Point 0 of Scroll Window (VESW0) Bit 7-0 Description Vertical End Point of Scroll Window [7:0] Default 0 Access RWREG[3Fh] Vertical End Point 1 of Scroll Window (VESW1) Bit 7-1 0 NA Vertical End Point of Scroll Window [8] Description Default 0 0 Access RO RW(HSSW,VSSW)Scroll Window(HESW,VESW)Figure 5-4 : Scroll WindowRAiO TECHNOLOGY INC.26/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller5-5Cursor Setting RegistersREG[40h] Memory Write Control Register 0 (MWCR0) Bit 7 6 5 4 Description Text Mode Enable 0 : Graphic mode. 1 : Text mode. Font Write Cursor/ Memory Write Cursor Enable 0 : Font write cursor/ Text Write Cursor is not visible. 1 : Font write cursor/ Text Write Cursor is visible. Font Write Cursor/ Memory Write Cursor Blink Enable 0 : Normal display. 1 : Blink display. NA Memory Write Direction (Only for Graphic Mode) 00b : Left Right then Top Down. 01b : Right Left then Top Down. 10b : Top Down then Left Right. 11b : Down Top then Left Right. Memory Write Cursor Auto-Increase Disable 0 : Cursor auto-increases when memory write. 1 : Cursor doesn’t auto-increases when memory write. Memory Read Cursor Auto-Increase Disable 0 : Cursor auto-increases when memory read. 1 : Cursor doesn’t auto-increases when memory read. Default 0 0 0 0 Access RW RW RW RO3-20RW1 00 0RW RWREG[41h] Memory Write Control Register1 (MWCR1) Bit 7 Description Graphic Cursor Enable 0 : Graphic Cursor disable. 1 : Graphic Cursor enable. Graphic Cursor Selection Bit Select one from eight graphic cursor types. (000b to 111b) 000b : Graphic Cursor Set 1. 001b : Graphic Cursor Set 2. 010b : Graphic Cursor Set 3. : : 111b : Graphic Cursor Set 8. Write Destination Selection 00b : Layer 1~2. 01b : CGRAM. 10b : Graphic Cursor. 11b : Pattern. Note : When CGRAM is selected (01b), REG[21h] bit 7 must be set as “0”. NA Layer No. for Writing Selection When resolution =& 480x400 or color depth = 8bpp: 0 : Layer 1. 1 : Layer 2. When resolution & 480x400 and color depth & 8bpp: NA, always writing to Layer 1. Default 0 Access RW6-40RW3-20RW10RO00RWRAiO TECHNOLOGY INC.27/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[44h] Blink Time Control Register (BTCR) Bit Description Text Blink Time Setting (Unit: Frame) 00h : 1 frame time. 01h : 2 frames time. 02h : 3 frames time. : : : FFh : 256 frames time. Default Access7-00RWREG[45h] Memory Read Cursor Direction (MRCD) Bit 7-2 Description NA Memory Read Direction (Only for Graphic Mode) 00b : Left Right then Top Down. 01b : Right Left then Top Down. 10b : Top Down then Left Right. 11b : Down Top then Left Right. Default 0 Access RO1-00RWREG[46h] Memory Write Cursor Horizontal Position Register 0 (CURH0) Bit 7-0 Description Memory Write Cursor Horizontal Location[7:0] Default 0 Access RWREG[47h] Memory Write Cursor Horizontal Position Register 1 (CURH1) Bit 7-2 1-0 NA Memory Write Cursor Horizontal Location[9:8] Description Default 0 0 Access RO RWREG[48h] Memory Write Cursor Vertical Position Register 0 (CURV0) Bit 7-0 Description Memory Write Cursor Vertical Location[7:0] Default 0 Access RWRAiO TECHNOLOGY INC.28/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[49h] Memory Write Cursor Vertical Position Register 1 (CURV1) Bit 7-1 0 NA Memory Write Cursor Vertical Location[8] Description Default 0 0 Access RO RWREG[4Ah] Memory Read Cursor Horizontal Position Register 0 (RCURH0) Bit 7-0 Description Memory Read Cursor Horizontal Location[7:0] Default 0 Access RWREG[4Bh] Memory Read Cursor Horizontal Position Register 1 (RCURH01) Bit 7-2 1-0 NA Memory Read Cursor Horizontal Location[9:8] Description Default 0 0 Access RO RWREG[4Ch] Memory Read Cursor Vertical Position Register 0 (RCURV0) Bit 7-0 Description Memory Read Cursor Vertical Location[7:0] Default 0 Access RWREG[4Dh] Memory Read Cursor Vertical Position Register 1 (RCURV1) Bit 7-1 0 NA Memory Read Cursor Vertical Location[8] Description Default 0 0 Access RO RWREG[4Eh] Font Write Cursor and Memory Write Cursor Horizontal Size Register (CURHS) Bit 7-5 4-0 Description NA Font Write Cursor Horizontal Size Setting[4:0] Unit : Pixel Note : When font is enlarged, the cursor setting will multiply the same times as the font enlargement. Default 0 7h Access RO RWREG[4Fh] Font Write Cursor Vertical Size Register (CURVS) Bit 7-5 4-0 Description NA Font Write Cursor Vertical Size Setting[4:0] Unit : Pixel Note : When font is enlarged, the cursor setting will multiply the same times as the font enlargement. Default 0 0 Access RO RWRAiO TECHNOLOGY INC.29/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller5-6Block Transfer Engine(BTE) Control RegistersREG[50h] BTE Function Control Register 0 (BECR0) Bit Description BTE Function Enable / Status Write 0 : No action. 1 : BTE function enable. Read 0 : BTE function is idle. 1 : BTE function is busy. BTE Source Data Select 0 : Block mode, the Source BTE is stored as a rectangular region of memory. 1 : Linear mode, the Source BTE is stored as a continuous block of memory. BTE Destination Data Type Select 0 : Block mode, the Destination BTE is stored as a rectangular region of memory. 1 : Linear mode, the Destination BTE is stored as a continuous block of memory. NA Default Access70RW60RW50RW4-00ROREG[51h] BTE Function Control Register1 (BECR1) Bit 7-4 Description BTE ROP Code Bit[3:0] ROP is the acronym for Raster Operation. Some of BTE operation code has to collocate with ROP for the detailed function. (Please refer to the Section 7-6) BTE Operation Code Bit[3:0] RA8875 includes a 2D BTE Engine, it can execute 13 BTE functions, the operation code range is from 1100b to 0000b and 1111b to 1101b are not used. Some of BTE Operation Code has to collocate with the ROP code for the advance function. (Please refer to the Section 7-6) Default 0 Access RW3-00RWRAiO TECHNOLOGY INC.30/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[52h] Layer Transparency Register0 (LTPR0) Bit 7-6 Description Layer1/2 Scroll Mode 00b : Layer 1/2 scroll simultaneously. 01b : Only Layer 1 scroll. 10b : Only Layer 2 scroll. 11b: Buffer scroll (using Layer 2 as scroll buffer) Floating Windows Transparency Display With BGTR 0: Disable 1: Enable NA Layer1/2 Display Mode 000b : Only Layer 1 is visible. 001b : Only Layer 2 is visible. 010b : Lighten-overlay mode. 011b : Transparent mode. 100b : Boolean OR. 101b : Boolean AND. 110b : Floating window mode. 111b : Reserve. Default Access0RW5 4-30 0RW RO2-00RWNote : It's suggested that REG[40h] Bit 7 should be set as 1'b0 when using &buffer scroll function&.REG[53h] Layer Transparency Register1 (LTPR1) Bit Description Layer Transparency Setting for Layer 2 0000b : Total display. 0001b : 7/8 display. 0010b : 3/4 display. 0011b : 5/8 display. 0100b : 1/2 display. 0101b : 3/8 display. 0110b : 1/4 display. 0111b : 1/8 display. 1000b : Display disable. Layer Transparency Setting for Layer 1 0000b : Total display. 0001b : 7/8 display. 0010b : 3/4 display. 0011b : 5/8 display. 0100b : 1/2 display. 0101b : 3/8 display. 0110b : 1/4 display. 0111b : 1/8 display. 1000b : Display disable. Default Access7-40RW3-00RWREG[54h] Horizontal Source Point 0 of BTE (HSBE0) Bit 7-0 Description Horizontal Source Point of BTE [7:0] Default 0 Access RWRAiO TECHNOLOGY INC.31/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[55h] Horizontal Source Point 1 of BTE (HSBE1) Bit 7-2 1-0 NA Horizontal Source Point of BTE [9:8] Description Default 0 0 Access RO RWREG[56h] Vertical Source Point 0 of BTE (VSBE0) Bit 7-0 Description Vertical Source Point of BTE [7:0] Default 0 Access RWREG[57h] Vertical Source Point 1 of BTE (VSBE1) Bit 7 6-1 0 Description BTE Source Layer Selection 0 : Layer 1. 1 : Layer 2. NA Vertical Source Point of BTE [8] Default 0 0 0 Access RW RO RWREG[58h] Horizontal Destination Point 0 of BTE (HDBE0) Bit 7-0 Description Horizontal Destination Point of BTE [7:0] Default 0 Access RWREG[59h] Horizontal Destination Point 1 of BTE (HDBE1) Bit 7-2 1-0 Description NA Horizontal Destination Point of BTE [9:8] Default 0 0 Access RO RWREG[5Ah] Vertical Destination Point 0 of BTE (VDBE0) Bit 7-0 Description Vertical Destination Point of BTE [7:0] Default 0 Access RWREG[5Bh] Vertical Destination Point 1 of BTE (VDBE1) Bit 7 6-1 0 Description BTE Destination Layer Selection 0 : Layer 1. 1 : Layer 2. NA Vertical Destination Point of BTE [8] Default 0 0 0 Access RW RO RWRAiO TECHNOLOGY INC.32/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[5Ch] BTE Width Register 0 (BEWR0) Bit 7-0 BTE Width Setting[7:0] Description Default 0 Access RWREG[5Dh] BTE Width Register 1 (BEWR1) Bit 7-2 1-0 NA BTE Width Setting [9:8] Description Default 0 0 Access RO RWREG[5Eh] BTE Height Register 0 (BEHR0) Bit 7-0 BTE Height Setting[7:0] Description Default 0 Access RWREG[5Fh] BTE Height Register 1 (BEHR1) Bit 7-2 1-0 NA BTE Height Setting [9:8] Description Default 0 0 Access RO RWREG[60h] Background Color Register 0 (BGCR0) Bit 7-5 Description Default 0 Access R0NA Background Color Red[4:0] If REG[10h] Bit[3:2] is set to 256 colors, the register only uses 4-0 Bit[2:0]. If REG[10h] Bit[3:2] is set to 65K colors, the register uses Bit[4:0]. The Register is used to set the red part of BTE background colors.0RWREG[61h] Background Color Register 1 (BGCR1) Bit 7-6 Description Default 0 Access R0NA Background Color Green[5:0] If REG[10h] Bit[3:2] is set to 256 colors, the register only uses 5-0 Bit[2:0]. If REG[10h] Bit[3:2] is set to 65K colors, the register uses Bit[5:0]. The Register is used to set the green part of BTE background colors.0RWRAiO TECHNOLOGY INC.33/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[62h] Background Color Register 2 (BGCR2) Bit 7-5 Description Default 0 Access R0NA Background Color Blue[4:0] If REG[10h] Bit[3:2] is set to 256 colors, the register only uses 4-0 Bit[1:0]. If REG[10h] Bit[3:2] is set to 65K colors, the register uses Bit[4:0]. The Register is used to set the blue part of BTE background colors.0RWREG[63h] Foreground Color Register 0 (FGCR0) Bit 7-5 Description Default 0 Access R0NA Foreground Color Red[4:0] If REG[10h] Bit[3:2] is set to 256 colors, the register only uses 4-0 Bit[2:0]. If REG[10h] Bit[3:2] is set to 65K colors, the register uses Bit[4:0]. The Register is used to set the red part of BTE foreground colors.0RWREG[64h] Foreground Color Register 1 (FGCR1) Bit 7-6 Description Default 0 Access R0NA Foreground Color Green[5:0] If REG[10h] Bit[3:2] is set to 256 colors, the register only uses 5-0 Bit[2:0]. If REG[10h] Bit[3:2] is set to 65K colors, the register uses Bit[5:0]. The Register is used to set the green part of BTE foreground colors.0RWREG[65h] Foreground Color Register 2 (FGCR2) Bit 7-5 Description NA Foreground Color Blue[4:0] If REG[10h] Bit[3:2] is set to 256 colors, the register only uses Bit[1:0]. If REG[10h] Bit[3:2] is set to 65K colors, the register uses Bit[4:0]. Default 0 Access R04-00RWRAiO TECHNOLOGY INC.34/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[66h] Pattern Set No for BTE (PTNO) Bit 7 6-4 3-0 Description Pattern Format 0: 8x8 1: 16x16 NA Pattern Set No If pattern Format = 8x8 then Pattern Set [3:0] is valid If pattern Format = 16x16 then Pattern Set [1:0] is valid Default 0 0 0 Access RW RO RWREG[67h] Background Color Register for Transparent 0 (BGTR0) Bit 7-5 Description NA Background Color Register for Transparent Red[4:0] If REG[10h] Bit[3:2] is set to 256 colors, the register only uses Bit[2:0]. If REG[10h] Bit[3:2] is set to 65K colors, the register uses Bit[4:0]. Default 0 Access R04-00RWREG[68h] Background Color Register for Transparent 1 (BGTR1) Bit 7-6 Description NA Foreground Color Green[5:0] If REG[10h] Bit[3:2] is set to 256 colors, the register only uses Bit[2:0]. If REG[10h] Bit[3:2] is set to 65K colors, the register uses Bit[5:0]. Default 0 Access R05-00RWREG[69h] Background Color Register for Transparent 2 (BGTR2) Bit 7-5 Description NA Foreground Color Blue[4:0] If REG[10h] Bit[3:2] is set to 256 colors, the register only uses Bit[1:0]. If REG[10h] Bit[3:2] is set to 65K colors, the register uses Bit[4:0]. Default 0 Access R04-00RWRAiO TECHNOLOGY INC.35/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller5-7Touch Panel Control RegistersREG[70h] Touch Panel Control Register 0 (TPCR0) Bit 7 Description Touch Panel Enable Bit 0 : Disable 1 : Enable TP Sample Time Adjusting 000b : Wait 512 system clocks period for ADC data ready. 001b : Wait 1024 system clocks period for ADC data ready. 010b : Wait 2048 system clocks period for ADC data ready. 011b : Wait 4096 system clocks period for ADC data ready. 100b : Wait 8192 system clocks period for ADC data ready. 101b : Wait 16384 system clocks period for ADC data ready. 110b : Wait 32768 system clocks period for ADC data ready. 111b : Wait 65536 system clocks period for ADC data ready. Touch Panel Wakeup Enable 0 : Disable the Touch Panel wake-up function. 1 : Touch Panel can wake-up the sleep mode. ADC Clock Setting 000b : System CLK 001b : (System CLK) / 2. 010b : (System CLK) / 4. 011b : (System CLK) / 8. 100b : (System CLK) / 16. 101b : (System CLK) / 32. 110b : (System CLK) / 64. 111b : (System CLK) / 128. Default 0 Access RW6-40RW30RW2-00RWREG[71h] Touch Panel Control Register 1 (TPCR1) Bit 7 6 Description N/A TP Manual Mode Enable 0 : Auto mode. 1 : Using the manual mode. TP ADC Reference Voltage Source 0 : Vref generated from internal circuit. No external voltage is needed. 1 : Vref from external source, 1/2 VDD is needed for ADC. NA De-bounce Circuit Enable for Touch Panel Interrupt 0: De-bounce circuit disable. 1: De-bounce circuit enable. Mode Selection for TP Manual Mode 00b : IDLE mode: Touch Panel in idle mode. 01b : Wait for TP event, Touch Panel event could cause the interrupt or be read from REG[F1h] Bit2. 10b : Latch X data, in the phase, X Data can be latched in REG[72h] and REG[74h]. 11b : Latch Y data, in the phase, Y Data can be latched in REG[73h] and REG[74h]. Default 0 0 Access RO RW5 4-3 20 0 0RW RO R/W1-00RWRAiO TECHNOLOGY INC.36/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller REG[72h] Touch Panel X High Byte Data Register (TPXH) Bit 7-0 Description Touch Panel X Data Bit[9:2] Default 0 Access RWREG[73h] Touch Panel Y High Byte Data Register (TPYH) Bit 7-0 Description Touch Panel Y Data Bit[9:2] Default 0 Access RWREG[74h] Touch Panel X/Y Low Byte Data Register (TPXYL) Bit 7 6-4 3-2 1-0 Description ADET Touch Event Detector 0 : Touch Panel is touched. 1 : Touch Panel is not touched. NA Touch Panel Y Data Bit[1:0] Touch Panel X Data Bit[1:0] Default 1 0 0 0 Access RO RO RW RWRAiO TECHNOLOGY INC.37/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller5-8Graphic Cursor Setting RegistersREG[80h] Graphic Cursor Horizontal Position Register 0 (GCHP0) Bit 7-0 Description Graphic Cursor Horizontal Location[7:0] Default 0 Access RWREG[81h] Graphic Cursor Horizontal Position Register 1 (GCHP1) Bit 7-2 1-0 NA Graphic Cursor Horizontal Location[9:8] Description Default 0 0 Access RO RWREG[82h] Graphic Cursor Vertical Position Register 0 (GCVP0) Bit 7-0 Description Graphic Cursor Vertical Location[7:0] Default 0 Access RWREG[83h] Graphic Cursor Vertical Position Register 1 (GCVP1) Bit 7-1 0 NA Graphic Cursor Vertical Location[8] Description Default 0 0 Access RO RWREG[84h] Graphic Cursor Color 0 (GCC0) Bit 7-0 Description Graphic Cursor Color 0 with 256 Colors RGB Format [7:0] = RRRGGGBB. Default 0 Access RWREG[85h] Graphic Cursor Color 1 (GCC1) Bit 7-0 Description Graphic Cursor Color 1 with 256 Colors RGB Format [7:0] = RRRGGGBB. Default 0 Access RWRAiO TECHNOLOGY INC.38/174.twRA8875Draft Version 0.1 Character / Graphic TFT LCD Controller5-9PLL Setting RegistersREG[88h] PLL Control Register 1 (PLLC1) Bit 7 6-5 4-0 Description PLLDIVM PLL Pre-driver parameter. 0 : divided by 1. 1 :